#ifndef __MEMMAP_H__
#define __MEMMAP_H__

#define SYS_CTRL_BASE		0x7050000000
#define TOP_BASE		SYS_CTRL_BASE
#define SG2044_TOP_BASE		TOP_BASE

#define REG_TOP_CONF_INFO	0x4
#define BOOT_SEL_ADDR		(TOP_BASE + REG_TOP_CONF_INFO)
#define BOOT_FROM_SRAM  	(1 << 2)

#define REG_TOP_MISC_CONTROL		0x8
#define REG_TOP_MISC_CONTROL_ADDR	(TOP_BASE + REG_TOP_MISC_CONTROL)
#define RGMII0_DISABLE_INTERNAL_DELAY	(1 << 16)

#endif
